Note to users. If you're seeing this message, it means that your browser cannot find this page's style/presentation instructions -- or possibly that you are using a browser that does not support current Web standards. Find out more about why this message is appearing, and what you can do to make your experience of our site the best it can be.

Science 11 April 2008:
Vol. 320. no. 5873, pp. 190 - 194
DOI: 10.1126/science.1145799
Prev | Table of Contents | Next

Review

Magnetic Domain-Wall Racetrack Memory

Stuart S. P. Parkin,* Masamitsu Hayashi, Luc Thomas

Recent developments in the controlled movement of domain walls in magnetic nanowires by short pulses of spin-polarized current give promise of a nonvolatile memory device with the high performance and reliability of conventional solid-state memory but at the low cost of conventional magnetic disk drive storage. The racetrack memory described in this review comprises an array of magnetic nanowires arranged horizontally or vertically on a silicon chip. Individual spintronic reading and writing nanodevices are used to modify or read a train of ~10 to 100 domain walls, which store a series of data bits in each nanowire. This racetrack memory is an example of the move toward innately three-dimensional microelectronic devices.

IBM Almaden Research Center, San Jose, CA 95120–6099, USA.

* To whom correspondence should be addressed. E-mail: parkin{at}almaden.ibm.com

Read the Full Text

To Advertise     Find Products

Science. ISSN 0036-8075 (print), 1095-9203 (online)